46 #ifndef IRPyro_API_single_device_layer 47 #define IRPyro_API_single_device_layer 64 #define INT_DISABLE 0x00 65 #define INT_ENABLE 0x01 66 #define TEMP_DISABLE 0x00 67 #define TEMP_ENABLE 0x01 70 #define CLK_DISABLE 0x00 71 #define CLK_ENABLE 0x01 72 #define HP_DISABLE 0x00 73 #define HP_ENABLE 0x01 74 #define LOW_POWER_DISABLE 0x00 75 #define LOW_POWER_ENABLE 0x01 76 #define LOW_PASS_180 0x00 77 #define LOW_PASS_90 0x01 78 #define LOW_PASS_45 0x02 79 #define LOW_PASS_22_5 0x03 80 #define LOW_PASS_30 0x00 81 #define LOW_PASS_15 0x01 82 #define LOW_PASS_75 0x02 83 #define LOW_PASS_3_75 0x03 100 #define CH_DISABLE 0x00 101 #define CH_ENABLE 0x01 102 #define FEEDBACK_50_20 0x00 103 #define FEEDBACK_100_40 0x01 104 #define FEEDBACK_200_80 0x02 105 #define FEEDBACK_400_160 0x03 106 #define FEEDBACK_800_320 0x04 107 #define FEEDBACK_1600_640 0x05 108 #define FEEDBACK_3200_1280 0x07 117 #define HIGH_PASS_1HZ 0x00 118 #define HIGH_PASS_2HZ 0x01 119 #define HIGH_PASS_4HZ 0x02 120 #define HIGH_PASS_8HZ 0x03 121 #define HIGH_PASS_0_17HZ 0x00 122 #define HIGH_PASS_0_33HZ 0x01 123 #define HIGH_PASS_0_66HZ 0x02 124 #define HIGH_PASS_1_30HZ 0x03 126 #define TCONDUCT_1_2T 0x00 127 #define TCONDUCT_0_6T 0x01 128 #define TCONDUCT_0_3T 0x02 129 #define TCONDUCT_0_15T 0x03 145 #define REF_CH_0 0x00 146 #define REF_CH_1 0x01 147 #define REF_CH_2 0x02 148 #define REF_CH_3 0x03 149 #define REF_CH_4 0x04 150 #define SEL_CH_0 0x00 151 #define SEL_CH_1 0x01 152 #define SEL_CH_2 0x02 153 #define SEL_CH_3 0x03 154 #define SEL_CH_4 0x04 155 #define SLEEP_MODE_ONE_CH 0x00 156 #define SLEEP_MODE_TWO_CH 0x01 157 #define DEFAULT_NO_EVENTS 0x0A 158 #define NOT_IN_USE_VALUE 0x00 159 #define MAX_WUP_THRESHOLD 0xFF 160 #define MIN_WUP_THRESHOLD 0x00 161 #define SAFE_WUP_THRESHOLD 0xB4 171 #define IRPyro_CHANNEL_DATA_VALUES 6 // 5 channel values + frame counter 172 #define IRPyro_CCP_NUMBER_OF_REGISTERS 5 // one CPP register per channel 173 #define IRPyro_DATA_SIZE 17 // bytes in an IRPyro frame uint8_t CS_Port
CS (Chip select) port.
uint8_t ST
Sleep_mode_type.
uint8_t LP
Enable low power mode: 1 Enable, 0 Disable.
power_settings_type normal_power
normal power configuration
WUP_reg_type WUP_register
WUP (Wake Up) configuration register.
uint8_t Feedback_transconductance
Charge amp. trans-conductance selection.
IRPyro Power Settings structure definition
uint8_t C_LP
Low pass selection.
IRPyro Channel filter configuration structure
IRPyro device structure definition
uint8_t IRPyro_open(IRPyro_sensor_device_type *this_device)
Initializes the IRPyro device.
uint8_t C_LP
Low pass filter selection.
uint8_t COUNT
Number of frames available.
IRPyro Channel Control Package register structure definition
uint8_t address
I2C address in 7 bit format.
uint8_t CLK_OUT
1 enable internal clock output on Clk pin, 0 disable internal clock output on the Clk pin (only apply...
uint8_t number_of_active_channels
useful for read()
uint8_t UHT
Byte 0 to 3 (Upper and Lower thresholds) are the 8 MSB of channel ADC data (unsigned value)...
uint8_t IRPyro_ioctl(IRPyro_sensor_device_type *this_device, IRPyro_cmd_type *cmd, IRPyro_arg_type arg)
access to IRPyro registers
FIFO_reg_type FIFO_register
FIFO status register.
uint8_t STATUS_CODE
response to read operation: 00 no error, 01 fifo full, 10 i2c master read less, 11 i2c master read mo...
uint8_t S7_S0
Sampling rate (8 bit) :Sampling Rate = 1000/(N+1).
uint8_t S7_S0
sample rate value
uint8_t CH0_CH2
Selected channel coding.
uint8_t High_pass_filter_setting
High pass selection.
uint8_t Feedback_cap
Feedback capacitor selection.
power_settings_type low_power
low power configuration
#define IRPyro_CHANNEL_DATA_VALUES
uint8_t TEMP
0 Normal channel data, 1 temperature data (apply to channel 0 only). When this bit is set...
IRPyro Wake Up Package register structure definition
uint8_t status_bit
Status bit : Active (1) / Disable (0)
#define IRPyro_CCP_NUMBER_OF_REGISTERS
IRPyro Analog Front End (AFE) register structure definition
struct IRPyro_arg IRPyro_arg_type
uint8_t IRPyro_read(IRPyro_sensor_device_type *this_device)
Reads a frame of data from the IRPyro.
uint8_t DATA_READY
Data ready.
uint8_t IRPyro_close(IRPyro_sensor_device_type *this_device)
Stops streaming, deallocates memory and disable the IRPyro sensor.
uint8_t SYNC
Sync & Clk Pin option: 0 master, 1 slave.
enum IRPyro_command IRPyro_command_type
Used by the IOCTL function to act a command that modifies AFE and CCP.
uint8_t read_mode
interrupt (0), polled (1) or synchronized sampling (2)
uint8_t channel
selected channel
IRPyro_command
Used by the IOCTL function to act a command that modifies AFE and CCP.
WUP_reg_type WUP_register
WUP (Wake Up) configuration register.
uint8_t DP0_DP2
Reference channel coding DP0-DP2: The Reference channel coding, and CH0-CH2: the selected channel cod...
Public functions of Micro controller specific code to access the IRPyro sensor.
uint8_t WT_Threshold
Byte 4 is the number of samples required to trigger the wake up algorithm. ? UHT and ULT to detect po...
uint8_t channel_saturation_byte
Active frame saturation byte.
uint8_t INT
Interrupt output: 1 Enable, 0 Disable (only apply at normal operation and not in Sleep mode)...
uint8_t HP
Enable high pass filter: 1 Enable, 0 Disable. this is the enable trigger which needs to be set after ...
AFE_reg_type AFE_register
AFE (analog front end) configuration register.
IRPyro FIFO packet structure definition
uint8_t INT_Port
INT (Interrupt / Data Ready ) port.
uint8_t cmd_return_code
command result
uint8_t High_pass_filter_setting
High pass selection.
uint8_t LP
Enable low power mode: 1 Enable, 0 Disable.
struct IRPyro_cmd IRPyro_cmd_type
IRPyro_command_type cmd
command
AFE_reg_type AFE_register
AFE (analog front end) configuration register.