IRPyro API
(sKEMLIB1)
Collection of routines and data structures covering the functionality of the IRPyro sensor
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Go to the documentation of this file.
76 #define IRPyro_TEST 0x00
77 #define IRPyro_VERSION 0x02
78 #define IRPyro_FIFO_STATUS 0x04
79 #define IRPyro_FIFO_READ_FULL 0x06
80 #define IRPyro_FIFO_READ_ACTIVE 0x08
81 #define IRPyro_FIFO_CLEAR 0x0A
82 #define IRPyro_FIFO_RESET 0x0C
83 #define IRPyro_CCP_READ 0x0E
84 #define IRPyro_CCP_WRITE 0x10
85 #define IRPyro_AFE_READ 0x12
86 #define IRPyro_AFE_WRITE 0x14
87 #define IRPyro_WUP_READ 0x16
88 #define IRPyro_WUP_WRITE 0x18
89 #define IRPyro_ADDR_WRITE 0x1E
90 #define IRPyro_GO_TO_SLEEP 0x20
91 #define IRPyro_WAKE_UP 0x22
92 #define IRPyro_RESET_SOFT 0x24
93 #define IRPyro_RESET_FULL 0x26
103 #define IRPyro_TEST_OK 0x01
104 #define IRPyro_TEST_ERR 0x02
105 #define IRPyro_FIFO_CLEAR_OK 0X29
106 #define IRPyro_FIFO_CLEAR_ERR 0X2A
107 #define IRPyro_FIFO_RESET_OK 0X31
108 #define IRPyro_FIFO_RESET_ERR 0X32
109 #define IRPyro_GO_TO_SLEEP_OK 0X81
110 #define IRPyro_GO_TO_SLEEP_ERR 0X82
111 #define IRPyro_WAKE_UP_OK 0X89
112 #define IRPyro_WAKE_UP_ERR 0X8A
113 #define IRPyro_RESET_SOFT_OK 0X91
114 #define IRPyro_RESET_SOFT_ERR 0X92
115 #define IRPyro_RESET_FULL_OK 0X99
116 #define IRPyro_RESET_FULL_ERR 0X9A
131 #define IRPyro_DEFAULT_I2C 0x65
145 #define IRPyro_DATA_SIZE 17 // bytes in an IRPyro frame
146 #define IRPyro_AFE_SIZE 2 // bytes on the IRPyro AFE register
147 #define IRPyro_CCP_SIZE 5 // bytes on the IRPyro CCP register
148 #define IRPyro_WUP_SIZE 6 // bytes on the IRPyro WUP register
149 #define IRPyro_FIFO_STATUS_SIZE 1 // byte of the IRPyro STS register
150 #define IRPyro_BYTES_PER_CHANNEL 3 // 24 bits unsigned channel data MSB to LSB
151 #define IRPyro_BYTES_FRAME_COUNT 2 // 16 bit frame counter
152 #define IRPyro_FIFO_NO_FRAMES 14 // frames of IRPyro_DATA_SIZE
153 #define IRPyro_MAX_FRAME_COUNT 0xFFFF // maximum value on the frame counter
154 #define IRPyro_FIFO_WAKE_MASK 0X80 // masks the FIFO WAKE detection from the FIFO status
155 #define IRPyro_FIFO_INT_MASK 0X01 // masks the FIFO INT from the FIFO status
156 #define IRPyro_FIFO_COUNT_MASK 0X1E // masks the FIFO count from the FIFO status
157 #define IRPyro_FIFO_ERROR_MASK 0X60 // masks the FIFO ERROR from the FIFO status
158 #define IRPyro_FIFO_ERROR_OK 0X00 // FIFO status OK
159 #define IRPyro_FIFO_ERROR_WRITE_FULL 0X01 // write when FIFO is full (FIFO count = 14) or read when FIFO is empty (FIFO count = 0)
160 #define IRPyro_FIFO_ERROR_I2C_EARLY 0X02 // detect I2C read FIFO early termination (read less bytes than expected)
161 #define IRPyro_FIFO_ERROR_I2C_EXTRA 0X03 // detect I2C read FIFO extra (read more bytes than expected)
163 #define IRPyro_FRAME_COUNT_TOP_BYTE 2 // top byte index location frame count
164 #define IRPyro_FRAME_COUNT_LOW_BYTE 1 // low byte index location frame count
165 #define IRPyro_SHIFT_TO_MSB 8 // bits to shift left the top byte of the frame count
166 #define IRPyro_SHIFT_ONE 1 // shift one bit
167 #define IRPyro_SHIFT_FOUR 4 // shift FOUR bitS
168 #define IRPyro_CHANNEL_DATA 0x7FFFFF // 23 bits unsigned channel data
169 #define IRPyro_CHANNEL_SAT 0X800000 // bit 24 saturation OFF(0)/ON(1)
170 #define IRPyro_FRAME_COUNT_LOCATION 5 // position on the user data buffer
191 #define AFE_INIT_DEFAULT(X) AFE_reg_type X = { \
193 .LP = LOW_POWER_DISABLE, \
195 .C_LP = LOW_PASS_180, \
196 .CLK_OUT = CLK_ENABLE, \
198 .TEMP = TEMP_DISABLE,\
209 #define CCP_INIT_DEFAULT(X) CCP_reg_type X = { \
210 .status_bit = CH_ENABLE, \
211 .Feedback_transconductance = TCONDUCT_1_2T, \
212 .High_pass_filter_setting = HIGH_PASS_1HZ, \
213 .Feedback_cap = FEEDBACK_50_20 \
227 #define WUP_INIT_DEFAULT(X) WUP_reg_type X ={ \
232 .WT_Threshold = 0x10, \
233 .DP0_DP2 = REF_CH_0, \
234 .CH0_CH2 = SEL_CH_2, \
235 .ST = SLEEP_MODE_ONE_CH \
238 #define NORMAL_POWER_INIT_DEFAULT(X) power_settings_type X ={ \
240 .C_LP = LOW_PASS_180, \
241 .CCP_High_pass[0].High_pass_filter_setting = HIGH_PASS_1HZ, \
242 .CCP_High_pass[1].High_pass_filter_setting = HIGH_PASS_1HZ, \
243 .CCP_High_pass[2].High_pass_filter_setting = HIGH_PASS_1HZ, \
244 .CCP_High_pass[3].High_pass_filter_setting = HIGH_PASS_1HZ, \
245 .CCP_High_pass[4].High_pass_filter_setting = HIGH_PASS_1HZ, \
250 .WT_Threshold = 0x10, \
253 #define LOW_POWER_INIT_DEFAULT(X) power_settings_type X ={ \
255 .C_LP = LOW_PASS_30, \
256 .CCP_High_pass[0].High_pass_filter_setting = HIGH_PASS_0_17HZ, \
257 .CCP_High_pass[1].High_pass_filter_setting = HIGH_PASS_0_17HZ, \
258 .CCP_High_pass[2].High_pass_filter_setting = HIGH_PASS_0_17HZ, \
259 .CCP_High_pass[3].High_pass_filter_setting = HIGH_PASS_0_17HZ, \
260 .CCP_High_pass[4].High_pass_filter_setting = HIGH_PASS_0_17HZ, \
265 .WT_Threshold = 0x10, \
323 uint8_t results_init_sequence[6]= {0};
324 uint8_t op_result = 0;
327 results_init_sequence[1]=
AFE_init(this_device);
328 results_init_sequence[2]=
CCP_init(this_device);
329 results_init_sequence[3]=
WUP_init(this_device);
330 results_init_sequence[4]=
FIFO_reset(this_device);
332 for(uint8_t idx=0; idx<5; ++idx)
334 op_result += results_init_sequence[idx];
336 op_result = (op_result == 5) ? 1 : 0;
387 uint8_t op_result = 0;
428 uint8_t op_result = 0;
524 uint8_t op_result = 0;
543 uint8_t op_result = 0;
558 uint8_t op_result = 0;
571 uint8_t bit_value =0;
573 AFE_byte[0] = AFE_register.
S7_S0;
574 bit_value |= (AFE_register.
LP << 7 )& 0X80 ;
575 bit_value |= (AFE_register.
HP << 6 )& 0X40 ;
576 bit_value |= (AFE_register.
C_LP << 4 )& 0X30 ;
577 bit_value |= (AFE_register.
CLK_OUT << 3 )& 0X08 ;
578 bit_value |= (AFE_register.
SYNC << 2 )& 0X04 ;
579 bit_value |= (AFE_register.
TEMP << 1 )& 0X02 ;
580 bit_value |= (AFE_register.
INT << 0 )& 0X01 ;
581 AFE_byte[1] = bit_value;
588 AFE_register->
S7_S0 = AFE_bytes[0];
589 AFE_register->
LP = (AFE_bytes[1]& 0X80) >> 7;
590 AFE_register->
HP = (AFE_bytes[1]& 0X40) >> 6;
591 AFE_register->
C_LP = (AFE_bytes[1]& 0X30) >> 4;
592 AFE_register->
CLK_OUT = (AFE_bytes[1]& 0X08) >> 3;
593 AFE_register->
SYNC = (AFE_bytes[1]& 0X04) >> 2;
594 AFE_register->
TEMP = (AFE_bytes[1]& 0X02) >> 1;
595 AFE_register->
INT = (AFE_bytes[1]& 0X01) >> 0;
611 uint8_t op_result = 0, initialization_failed =0;
612 uint8_t selected_channel = 0, ch_to_activate =0;
621 selected_channel = 2;
625 selected_channel = 1;
629 initialization_failed =1;
632 if (!initialization_failed)
636 while(ch_to_activate)
641 this_device->
CCP_register[selected_channel] = ccp_defaults;
658 uint8_t op_result = 0;
675 uint8_t op_result = 0;
691 uint8_t bit_value = 0;
696 bit_value |= (CCP_register.
status_bit << 0)& 0X01 ;
697 *CCP_byte = bit_value;
707 CCP_register->
status_bit = (CCP_byte & 0X01 )>> 0 ;
723 uint8_t op_result = 0;
742 uint8_t op_result = 0;
757 uint8_t op_result = 0;
770 uint8_t bit_value = 0;
772 WUP_byte[0] = WUP_register.
UHT;
773 WUP_byte[1] = WUP_register.
ULT;
774 WUP_byte[2] = WUP_register.
LHT;
775 WUP_byte[3] = WUP_register.
LLT;
778 bit_value |= (WUP_register.
ST << 6)& 0X40 ;
779 bit_value |= (WUP_register.
DP0_DP2 << 3)& 0X38 ;
780 bit_value |= (WUP_register.
CH0_CH2 << 0)& 0X07 ;
781 WUP_byte[5] = bit_value;
788 WUP_register->
UHT = WUP_bytes[0];
789 WUP_register->
ULT = WUP_bytes[1];
790 WUP_register->
LHT = WUP_bytes[2];
791 WUP_register->
LLT = WUP_bytes[3];
793 WUP_register->
ST =(WUP_bytes[5] & 0X40) >> 6;
794 WUP_register->
DP0_DP2 =(WUP_bytes[5] & 0X38) >> 3;
795 WUP_register->
CH0_CH2 =(WUP_bytes[5] & 0X07) >> 0;
806 uint8_t op_result = 0;
807 uint8_t i2c_result = 0;
815 op_result = i2c_result;
829 uint8_t op_result = 0;
830 uint8_t i2c_result = 0;
849 op_result = i2c_result;
858 uint8_t IRPyro_Address = this_device->
address <<1;
865 op_result = i2c_result;
892 uint8_t op_result = 0;
893 uint8_t i2c_result = 0;
904 op_result = i2c_result;
907 op_result = i2c_result;
919 uint8_t IRPyro_Sensor_FIFO_status = 0;
920 uint8_t op_result = 0;
937 uint8_t op_result = 0;
938 uint8_t i2c_result = 0;
946 op_result = i2c_result;
975 uint8_t op_result = 0;
976 uint8_t i2c_result = 0;
984 op_result = i2c_result;
998 uint8_t op_result = 0;
999 uint8_t i2c_result = 0;
1001 if (i2c_result == 1)
1006 op_result = i2c_result;
1019 this_device->
low_power = low_power_init;
1029 uint8_t op_result = 0;
1050 uint8_t op_result = 0;
1109 uint8_t bytes_to_read = 0;
1110 uint8_t ch_saturated = 0;
1113 uint8_t channels_to_decode = 5;
1114 uint8_t channel_in_process = 0;
1115 uint8_t update_number_of_active_channels = 0;
1116 uint8_t channel_array[5] = {0};
1117 uint8_t channel_array_index = 0;
1123 channel_array[channel_array_index] = channel_in_process;
1124 ++ update_number_of_active_channels;
1125 ++ channel_array_index;
1127 -- channels_to_decode;
1128 ++ channel_in_process;
1130 while (channels_to_decode);
1137 uint8_t ch_data_pos;
1138 uint8_t final_data_location;
1140 final_data_location = channel_array[current_channel];
1157 uint8_t i = 0, result_empty = 0;
1158 uint8_t *AFE_pointer_one = &(first.
S7_S0);
1159 uint8_t AFE_size =
sizeof(first);
1163 result_empty +=AFE_pointer_one[i];
1166 return (result_empty == 0 ?1:0);
1175 uint8_t i = 0, result_empty = 0;
1177 uint8_t CCP_size =
sizeof(first);
1181 result_empty +=CCP_pointer_one[i];
1184 return (result_empty == 0 ?1:0);
1193 uint8_t i = 0, result_empty = 0;
1194 uint8_t *WUP_pointer_one = &(first.
UHT);
1195 uint8_t WUP_size =
sizeof(first);
1199 result_empty +=WUP_pointer_one[i];
1202 return (result_empty == 0 ?1:0);
1213 struct notice legend = {0x43 ,0x6f ,0x70 ,0x79 ,0x72 ,0x69 ,0x67 ,0x68 ,0x74 ,0x20 ,0x28 ,0x63 ,0x29 ,0x20 ,0x32 ,0x30 ,0x31 ,0x38 ,0x20 ,0x50 ,0x79 ,0x72 ,0x65 ,0x6f ,0x73 ,0x2c ,0x20 ,0x4c ,0x74 ,0x64 ,0x2e};
static void WUP_to_bytes(WUP_reg_type WUP_register, uint8_t *WUP_byte)
encodes the WUP register contents of this_device into the IRPyro
AFE_reg_type AFE_register
AFE (analog front end) configuration register.
#define IRPyro_ADDR_WRITE
IRPyro data structures and prototype functions.
CCP_filter_type CCP_High_pass[IRPyro_CCP_NUMBER_OF_REGISTERS]
High pass filter configuration for each channel on the IRPyro device.
uint32_t channel_value[IRPyro_CHANNEL_DATA_VALUES]
Active frame decoded channel data.
IRPyro_command_type cmd
command
uint8_t DP0_DP2
Reference channel coding DP0-DP2: The Reference channel coding, and CH0-CH2: the selected channel cod...
IRPyro Channel Control Package register structure definition.
uint8_t CLK_OUT
1 enable internal clock output on Clk pin, 0 disable internal clock output on the Clk pin (only apply...
#define IRPyro_GO_TO_SLEEP
static void AFE_to_bytes(AFE_reg_type AFE_register, uint8_t *AFE_byte)
encodes the AFE register contents of this_device into the IRPyro
uint8_t High_pass_filter_setting
High pass selection.
static uint8_t FIFO_reset(IRPyro_sensor_device_type *this_device)
Clear the entire FIFO (Rd/Wr pointer reset with the Empty)
uint8_t High_pass_filter_setting
High pass selection.
uint8_t S7_S0
Sampling rate (8 bit) :Sampling Rate = 1000/(N+1).
CCP_reg_type CCP_register[IRPyro_CCP_NUMBER_OF_REGISTERS]
Channel configuration registers 0 - 4.
uint8_t read_mode
interrupt (0), polled (1) or synchronized sampling (2)
#define IRPyro_FIFO_CLEAR_OK
static uint8_t WUP_init(IRPyro_sensor_device_type *this_device)
Initializes the WUP register with this_device values.
#define IRPyro_FRAME_COUNT_LOW_BYTE
uint8_t ST
Sleep_mode_type.
static uint8_t IRPyro_power_mode_sleep_set(IRPyro_sensor_device_type *this_device)
The device will automatically enter either low power or normal power sleep mode depending in the powe...
#define IRPyro_FIFO_STATUS_SIZE
Checksum string for the IRPyro API.
#define IRPyro_FIFO_STATUS
void power_set(uint8_t port, uint8_t pin)
Power sequence from the MCU to the IRPyro sensor.
uint8_t C_LP
Low pass filter selection.
uint8_t IRPyro_open(IRPyro_sensor_device_type *this_device)
Initializes the IRPyro device.
static uint8_t CCP_write(IRPyro_sensor_device_type *this_device)
writes the CCP registers contents of this_device into the IRPyro
static uint8_t WUP_register_empty(WUP_reg_type first)
Checks if the AFE register is empty.
#define IRPyro_FIFO_RESET
IRPyro device structure definition.
uint8_t i2c_Write(uint8_t DeviceAddr, uint8_t Command, uint8_t *pBuffer, uint8_t len)
Sends data via I2C port.
#define IRPyro_BYTES_PER_CHANNEL
IRPyro Wake Up Package register structure definition.
#define IRPyro_FRAME_COUNT_TOP_BYTE
static uint8_t IRPyro_power_mode_wakeup_set(IRPyro_sensor_device_type *this_device)
The device will automatically enter either low power or normal power sleep mode depending in the powe...
static uint8_t AFE_read(IRPyro_sensor_device_type *this_device, AFE_reg_type *AFE_data)
reads the AFE register on the IRPyro and loads into this_device
IRPyro Analog Front End (AFE) register structure definition.
uint8_t INT
Interrupt output: 1 Enable, 0 Disable (only apply at normal operation and not in Sleep mode).
uint8_t COUNT
Number of frames available.
static uint8_t WUP_write(IRPyro_sensor_device_type *this_device)
writes the WUP register contents of this_device into the IRPyro
static uint8_t AFE_register_empty(AFE_reg_type first)
Checks if the AFE register is empty.
Product and component names and versions.
#define IRPyro_FIFO_READ_ACTIVE
uint8_t STATUS_CODE
response to read operation: 00 no error, 01 fifo full, 10 i2c master read less, 11 i2c master read mo...
static uint8_t AFE_init(IRPyro_sensor_device_type *this_device)
Initializes the AFE register with this_device values.
#define LOW_POWER_INIT_DEFAULT(X)
static uint8_t AFE_write(IRPyro_sensor_device_type *this_device)
writes the AFE register contents of this_device into the IRPyro
uint8_t HP
Enable high pass filter: 1 Enable, 0 Disable. this is the enable trigger which needs to be set after ...
uint8_t number_of_active_channels
useful for read()
#define IRPyro_FIFO_INT_MASK
#define IRPyro_FIFO_COUNT_MASK
#define IRPyro_CHANNEL_SAT
#define IRPyro_FIFO_WAKE_MASK
#define NORMAL_POWER_INIT_DEFAULT(X)
uint8_t channel
selected channel
uint8_t UHT
Byte 0 to 3 (Upper and Lower thresholds) are the 8 MSB of channel ADC data (unsigned value).
uint8_t S7_S0
sample rate value
#define IRPyro_FRAME_COUNT_LOCATION
uint8_t DATA_READY
Data ready.
WUP_reg_type WUP_register
WUP (Wake Up) configuration register.
static struct notice IRPyro_checksum(void)
uint8_t C_LP
Low pass selection.
static uint8_t I2C_address_set(IRPyro_sensor_device_type *this_device)
Sends new I2C address to the IRPyro sensor Default i2c address is 0x65, if multiple devices are being...
#define IRPyro_GO_TO_SLEEP_OK
power_settings_type low_power
low power configuration
#define IRPyro_DEFAULT_I2C
uint8_t i2c_Read(uint8_t DeviceAddr, uint8_t Command, uint8_t *pBuffer, uint16_t len)
Reads data via I2C port.
#define IRPyro_FIFO_ERROR_MASK
uint8_t WT_Threshold
Byte 4 is the number of samples required to trigger the wake up algorithm. ? UHT and ULT to detect po...
static uint8_t CCP_register_empty(CCP_reg_type first)
Checks if the CCP register is empty.
static void CCP_to_bytes(CCP_reg_type CCP_register, uint8_t *CCP_byte)
encodes the CCP register contents of this_device into IRPyro
#define IRPyro_RESET_FULL
#define IRPyro_RESET_FULL_OK
uint8_t Feedback_cap
Feedback capacitor selection.
char IRPyro_API_notice[35]
#define IRPyro_SHIFT_FOUR
static uint8_t FIFO_ready_status_get(IRPyro_sensor_device_type *this_device)
Ask the IRPyro if a frame of data is available used when a polling reading operation has started.
FIFO_reg_type FIFO_register
FIFO status register.
uint8_t IRPyro_close(IRPyro_sensor_device_type *this_device)
Stops streaming, deallocates memory and disable the IRPyro sensor.
uint8_t raw_data[IRPyro_DATA_SIZE]
static uint8_t IRPyro_test(IRPyro_sensor_device_type *this_device)
Sends test code to the IRPyro sensor to confirm is there.
static void bytes_to_CCP(uint8_t CCP_byte, CCP_reg_type *CCP_register)
decodes the CCP register of the IRPyro into this_device
uint8_t Feedback_transconductance
Charge amp. trans-conductance selection.
#define CCP_INIT_DEFAULT(X)
uint8_t INT_pin_read(uint8_t port, uint8_t pin)
Reads the status of the pin assigned to the INT line of IRPyro.
static uint8_t CCP_read(IRPyro_sensor_device_type *this_device, CCP_reg_type *CCP_data)
reads the CCP registers on the IRPyro and loads into this_device
uint8_t TEMP
0 Normal channel data, 1 temperature data (apply to channel 0 only). When this bit is set,...
#define AFE_INIT_DEFAULT(X)
static uint8_t CCP_init(IRPyro_sensor_device_type *this_device)
Initializes the CCP register with this_device values.
uint8_t status_bit
Status bit : Active (1) / Disable (0)
void Micro_controller_delay_us(uint32_t time_us)
Example of delay function in micro seconds. Refer to section "12.8 Device Power Up and Reset" in the ...
void CS_pin_set(uint8_t port, uint8_t pin, uint8_t value)
ON/OFF control from the MCU to the IRPyro sensor.
uint8_t address
I2C address in 7 bit format.
static uint8_t IRPyro_power_settings_init(IRPyro_sensor_device_type *this_device)
initializes with defaults the power settings of an IRPyro device
WUP_reg_type WUP_register
WUP (Wake Up) configuration register.
static uint8_t IRPyro_power_mode_normal_set(IRPyro_sensor_device_type *this_device)
activates the normal power mode settings stored on the IRPyro structure
static uint8_t channel_value_decode(IRPyro_sensor_device_type *this_device)
Decodes the channel values on a given frame.
void Micro_controller_delay_ms(uint32_t time_ms)
Example of delay function.
static void bytes_to_AFE(uint8_t *AFE_bytes, AFE_reg_type *AFE_register)
decodes the AFE register of the IRPyro into this_device
uint8_t CH0_CH2
Selected channel coding.
uint8_t cmd_return_code
command result
uint8_t CS_Port
CS (Chip select) port.
#define IRPyro_FIFO_RESET_OK
#define IRPyro_SHIFT_TO_MSB
uint8_t channel_saturation_byte
Active frame saturation byte.
AFE_reg_type AFE_register
AFE (analog front end) configuration register.
#define WUP_INIT_DEFAULT(X)
static uint8_t WUP_read(IRPyro_sensor_device_type *this_device, WUP_reg_type *WUP_data)
reads the WUP register on the IRPyro and loads into this_device
static uint8_t FIFO_data_active_get(IRPyro_sensor_device_type *this_device)
Read data packet (up to 17 bytes) for only active channel.
static uint8_t IRPyro_power_mode_low_set(IRPyro_sensor_device_type *this_device)
activates the low power mode settings stored on the IRPyro structure
uint8_t SYNC
Sync & Clk Pin option: 0 master, 1 slave.
uint8_t IRPyro_read(IRPyro_sensor_device_type *this_device)
Reads a frame of data from the IRPyro.
#define IRPyro_BYTES_FRAME_COUNT
static void bytes_to_WUP(uint8_t *WUP_bytes, WUP_reg_type *WUP_register)
decodes the WUP register of the IRPyro into this_device
uint8_t IRPyro_ioctl(IRPyro_sensor_device_type *this_device, IRPyro_cmd_type *cmd, IRPyro_arg_type arg)
access to IRPyro registers
CCP_reg_type CCP_register[IRPyro_CCP_NUMBER_OF_REGISTERS]
Channel configuration register.
uint8_t LP
Enable low power mode: 1 Enable, 0 Disable.
#define IRPyro_FIFO_CLEAR
uint8_t INT_Port
INT (Interrupt / Data Ready ) port.
power_settings_type normal_power
normal power configuration